Analog Design Engineer Or Intern
(US Person)
The analog designer is expected to have experience/knowledge with circuit design at the transistor level in the Cadence environment from schematic entry to physical layout and parasitic extraction. Principle tasks will include:
- Design of analog blocks:
bandgap, IDACs, VDACs, analog reference buffers, ADCs, switched capacitor circuits and amplifiers, SRAM, and IO/ESD design - Top chip mixed-signal simulation
- Documenting designs for reviews and reports
- Test system design and fabricated chip characterization
Digital Design Engineer Or Intern
(US Person)
The digital designer is expected to have experience/knowledge with circuit design digital flow from Cadence or Synopsys, and a working knowledge of analog design principles and signal / power integrity.
- Fluent in Verilog/VHDL
- Fluent in Cadence or equivalent Digital ASIC Tool Suite (Genus,Innovus,Tempus,Voltus)
- Experience with high-level design, simulation, and verification tools
- Experience with scripting languages Python/PERL